Input and output points: 1024 points.
Input / output data points: 8192 points.
Program capacity: 60k.
Basic command processing speed (LD command) S:0.2.
PLC in the program execution stage: according to the order of the user program order to store the order of each instruction,
After the corresponding operation and processing, the result is written to the output status register,
The contents of the output status register are changed with the execution of the program Q2ACPU-S1 Hardware Manual Q2ACPU-S1 User's Manual Q2ACPU-S1
Output refresh phase: when all instructions are executed,
The output status register is sent to the output latch in the output refresh stage,
And through a certain way (relay, transistor or transistor) output, drive the corresponding output equipment Q2ACPU-S1 Hardware Manual Q2ACPU-S1 User's Manual. Upgraded version.
Control axis: maximum 8 axes.
Peripheral I/F: by CPU PLC.
Manual pulse generator operation function: can use 3 sets of manual pulse generator.
Synchronous encoder operation function: can use 8 synchronous encoder.
CPU special high speed communication bus, each 0.88ms cycle can exchange 14K data word.
Exercise basic performance is about 2 times, sports SFC processing time is reduced by about 1/4 Q2ACPU-S1 Hardware Manual Q2ACPU-S1 User's Manual.
PLC interrupt program to achieve high-speed synchronization between multiple CPU.
Motion specific instructionManual pulse generator /INC synchronous encoder input:
Use number: 3 sets of /1 modules.
Convenient processing of large capacity data.
In the past can not achieve the standard RAM and SRAM card file register area of continuous access,
The boundary of each area should be considered in programming.
The SRAM 8MB extension card is installed in the high speed universal QCPU,
Standard RAM can be used as a continuous file register,
Capacity up to 4736K words, thus simplifying the programming.
Thus, even if the memory space of the soft element is insufficient,
Can also be installed by the expansion of SRAM card, easy to extend the file register area.
The address register is extended to 32 bits, which can be programmed to go beyond the traditional 32K word,
And to achieve thhe extension to the file register to all regions of the file register Q2ACPU-S1 Hardware Manual Q2ACPU-S1 User's Manual.
In addition, the processing speed of the index modification plays an important role in the efficient operation of structured daata (array),
The speed has been improved Q2ACPU-S1 Hardware Manual Q2ACPU-S1 User's Manual.
When the index is used to modify the program repeatedly (e.g. from FOR to NEXT), the scan time can be reduced.