Number of input channels: 2Ch.
Input voltage: DC - 10 ~ 10V.
Input current: DC0 ~ 20mA.
Conversion speed: 80 s/ch.
Resolution: 1/12000.
Output channel number: 2Ch.
Output voltage: DC - 10 ~ 10V.
Output current: DC0 ~ 20mA.
Conversion speed: 80 s/ch.
Resolution: 1/12000.
Status of connected devices by means of alarm monitoring L26CPU-BT  CPU Module CPU Module L26CPU-BT  CPU Module.
Alarm output function
Process alarm L26CPU-BT 
When the digital value is in the range of preset, the output alarm.
Change rate alarm.
The output value of the output value of the digital output is too large (greater than the rate of change of the alarm limit) or too small (less than the rate of change), the output alarm.
Achieve stability measurement
Inter channel isolation
Isolation between the channels, can prevent the connection of sensors in the channel between the cross talk, so as to achieve stable measurement L26CPU-BT  CPU Module CPU Module L26CPU-BT  CPU Module.
High speed, smooth continuous analog output.
Waveform output function
Equipped with the industry''s first waveform output function.
The pre prepared waveform data can be imported into the analog output module, and the function of the analog output is simulated according to the set conversion period L26CPU-BT  CPU Module CPU Module L26CPU-BT  CPU Module.
It is not affected by the sequential scan time, and it can realize the high speed and smooth analog output. Input and output (DC/ differential).
Input points: 12 points (DC5V/DC24V/ differential universal).
Pulse input speed: the highest pulse/s 8M (2MHz).
Output points: 8 points (DC5V ~ DC24V) 6 points (differential).
Pulse output speed: the highest pulse/s 8M (2MHz).
High speed and stable input / output response
The high speed response can be achieved without the CPU module''s operation and bus performance,
Stable input and output response through hardware processing.
LD40PD01 is equipped with an external input and output interface and FPGA,
Therefore, high speed control can be realized without the influence of the scanning time of the CPU module and the bus performance (the input and output response time of the s instruction is realized).
Can achieve stable input and output response (processing time of the deviation of the ns level).
Through the intuitive tools for FPGA settings L26CPU-BT  CPU Module CPU Module L26CPU-BT  CPU Module.
In the FPGA design process can be omitted in the past must be designed to deal with (HDL description, logic synthesis and time verification),
Reeduce working hours L26CPU-BT  CPU Module CPU Module L26CPU-BT  CPU Module. After receiving the product can be used immediately to verify the use of special tools, can significantly shorten the design time.